Field
This disclosure relates generally to semiconductor processing, and more specifically, to wafer level chip scale packaging with an encapsulant.
Related Art
Chip scale packaging (CSP) allows for packaging on a chip size scale, typically within 1.2 times the die size. Wafer-level CSP (WLCSP) has allowed for further reduction in size. In WLCSP, interconnects, such as solder balls, are formed on the active surface of the die while the die are still part of a wafer, prior to singulation. This allows for multiple packages to be manufactured at the same time, and also allows the package to be the same size as the die. However, after singulation, the die are brittle because they are not covered with any encapsulant, making them susceptible to breakage during final test and during customer board mounting due to exposed silicon. Therefore, a need exists for WLCSP with improved robustness.